Packaging arrangements for multiple active circuit blocks are used to provide electrical connection between the active circuit blocks. A two-dimensional (2D) packaging arrangement has a central processing chip along with one or more active circuit blocks arranged on a same plane in a two-dimensional layout. The 2D packaging arrangement includes electrical routing for transferring signals between the active circuit blocks and between an active circuit block and the central processing chip on a same plane as the active circuit blocks.
A 2.5D packaging arrangement includes the central processing chip on a first plane and each of the active circuit blocks on a second plane different from the first plane. Electrical routing for transferring signals between the active circuit blocks is present in both planes of the 2.5D packaging arrangement.
A three dimensional (3D) packaging arrangement has the central processing chip and each active circuit block on a separate plane. A size of the active circuit blocks is artificially increased so that an area of the active circuit block substantially matches an area of the central processing chip. The size increase of the active circuit blocks does not increase a number of active elements within an active circuit block. The increased size is used to enable electrical routing to transfer signals between the various active circuit blocks and the central processing chip. The electrical routing lines from one plane to another pass through intervening active circuit blocks between active elements within the active circuit block.